1. Field of the Invention
The present invention relates generally to packaging substrates and fabrication methods thereof, and more particularly, to a packaging substrate having at least an embedded passive component and a fabrication method thereof.
2. Description of Related Art
Passive components are increasingly demanded along with the development of semiconductor packaging technologies. Passive components, such as capacitors, resistors or inductors, allow signals to pass through without any change. In contrast to an active component, a passive component cannot control the flow of electrons. Therefore, when voltage or current changes, the resistance or impedance of the passive component does not change.
Various products driven by electrical power require passive components for electronic loop control. The passive components can be applied in computer, communication and consumer electronic industries and so on. FIG. 1 shows a packaging substrate with a passive component. Referring to FIG. 1, a passive component 12 is mounted through a plurality of solder bumps 13 on conductive pads 11 of a substrate 10.
However, the passive component 12 mounted on the substrate 10 increases the height of the overall packaging structure, which does not meet the minimization trend of electronic products. Further, since the passive component 12 is mounted on an outer surface of the substrate 10, it leads to a long signal transmission path between an inner circuit of the substrate 10 and the passive component, thereby adversely affecting the electrical performance of the structure. In addition, the substrate 10 has conductive traces disposed on the surface thereof, thereby limiting the area available for mounting of the passive component 12.
Therefore, it is imperative to provide a packaging substrate having at least an embedded passive component and a fabrication method thereof so as to overcome the above drawbacks.